| #include <stdint.h> |
|
|
| #include <cpuinfo.h> |
| #include <x86/api.h> |
|
|
|
|
| enum cpuinfo_uarch cpuinfo_x86_decode_uarch( |
| enum cpuinfo_vendor vendor, |
| const struct cpuinfo_x86_model_info* model_info) |
| { |
| switch (vendor) { |
| case cpuinfo_vendor_intel: |
| switch (model_info->family) { |
| #if CPUINFO_ARCH_X86 |
| case 0x05: |
| switch (model_info->model) { |
| case 0x01: |
| case 0x02: |
| case 0x03: |
| case 0x04: |
| return cpuinfo_uarch_p5; |
| case 0x09: |
| return cpuinfo_uarch_quark; |
| } |
| break; |
| #endif |
| case 0x06: |
| switch (model_info->model) { |
| |
| #if CPUINFO_ARCH_X86 |
| case 0x01: |
| case 0x03: |
| case 0x05: |
| case 0x06: |
| case 0x07: |
| case 0x08: |
| case 0x0A: |
| case 0x0B: |
| return cpuinfo_uarch_p6; |
| case 0x09: |
| case 0x0D: |
| case 0x15: |
| return cpuinfo_uarch_dothan; |
| case 0x0E: |
| return cpuinfo_uarch_yonah; |
| #endif |
| case 0x0F: |
| case 0x16: |
| return cpuinfo_uarch_conroe; |
| case 0x17: |
| case 0x1D: |
| return cpuinfo_uarch_penryn; |
| case 0x1A: |
| case 0x1E: |
| case 0x1F: |
| case 0x2E: |
| case 0x25: |
| case 0x2C: |
| case 0x2F: |
| return cpuinfo_uarch_nehalem; |
| case 0x2A: |
| case 0x2D: |
| return cpuinfo_uarch_sandy_bridge; |
| case 0x3A: |
| case 0x3E: |
| return cpuinfo_uarch_ivy_bridge; |
| case 0x3C: |
| case 0x3F: |
| case 0x45: |
| case 0x46: |
| return cpuinfo_uarch_haswell; |
| case 0x3D: |
| case 0x47: |
| case 0x4F: |
| case 0x56: |
| return cpuinfo_uarch_broadwell; |
| case 0x4E: |
| case 0x55: |
| case 0x5E: |
| case 0x8E: |
| case 0x9E: |
| case 0xA5: |
| case 0xA6: |
| return cpuinfo_uarch_sky_lake; |
| case 0x66: |
| return cpuinfo_uarch_palm_cove; |
| case 0x6A: |
| case 0x6C: |
| case 0x7D: |
| case 0x7E: |
| return cpuinfo_uarch_sunny_cove; |
|
|
| |
| case 0x1C: |
| case 0x26: |
| return cpuinfo_uarch_bonnell; |
| case 0x27: |
| case 0x35: |
| case 0x36: |
| return cpuinfo_uarch_saltwell; |
| case 0x37: |
| case 0x4A: |
| case 0x4D: |
| case 0x5A: |
| case 0x5D: |
| return cpuinfo_uarch_silvermont; |
| case 0x4C: |
| case 0x75: |
| return cpuinfo_uarch_airmont; |
| case 0x5C: |
| case 0x5F: |
| return cpuinfo_uarch_goldmont; |
| case 0x7A: |
| return cpuinfo_uarch_goldmont_plus; |
|
|
| |
| case 0x57: |
| return cpuinfo_uarch_knights_landing; |
| case 0x85: |
| return cpuinfo_uarch_knights_mill; |
| } |
| break; |
| case 0x0F: |
| switch (model_info->model) { |
| case 0x00: |
| case 0x01: |
| case 0x02: |
| return cpuinfo_uarch_willamette; |
| break; |
| case 0x03: |
| case 0x04: |
| case 0x06: |
| return cpuinfo_uarch_prescott; |
| } |
| break; |
| } |
| break; |
| case cpuinfo_vendor_amd: |
| switch (model_info->family) { |
| #if CPUINFO_ARCH_X86 |
| case 0x5: |
| switch (model_info->model) { |
| case 0x00: |
| case 0x01: |
| case 0x02: |
| return cpuinfo_uarch_k5; |
| case 0x06: |
| case 0x07: |
| case 0x08: |
| case 0x0D: |
| return cpuinfo_uarch_k6; |
| case 0x0A: |
| return cpuinfo_uarch_geode; |
| } |
| break; |
| case 0x6: |
| return cpuinfo_uarch_k7; |
| #endif |
| case 0xF: |
| case 0x11: |
| return cpuinfo_uarch_k8; |
| case 0x10: |
| case 0x12: |
| return cpuinfo_uarch_k10; |
| case 0x14: |
| return cpuinfo_uarch_bobcat; |
| case 0x15: |
| switch (model_info->model) { |
| case 0x00: |
| case 0x01: |
| return cpuinfo_uarch_bulldozer; |
| case 0x02: |
| case 0x10: |
| case 0x13: |
| return cpuinfo_uarch_piledriver; |
| case 0x38: |
| case 0x30: |
| return cpuinfo_uarch_steamroller; |
| case 0x60: |
| case 0x65: |
| case 0x70: |
| return cpuinfo_uarch_excavator; |
| default: |
| switch (model_info->extended_model) { |
| case 0x0: |
| return cpuinfo_uarch_bulldozer; |
| case 0x1: |
| case 0x2: |
| return cpuinfo_uarch_piledriver; |
| case 0x3: |
| case 0x4: |
| return cpuinfo_uarch_steamroller; |
| } |
| break; |
| } |
| break; |
| case 0x16: |
| if (model_info->extended_model >= 0x03) { |
| return cpuinfo_uarch_puma; |
| } else { |
| return cpuinfo_uarch_jaguar; |
| } |
| case 0x17: |
| switch (model_info->extended_model) { |
| case 0x0: |
| case 0x1: |
| return cpuinfo_uarch_zen; |
| case 0x3: |
| case 0x4: |
| case 0x6: |
| case 0x7: |
| case 0x9: |
| return cpuinfo_uarch_zen2; |
| } |
| break; |
| case 0x19: |
| switch (model_info->extended_model) { |
| case 0x0: |
| case 0x2: |
| case 0x3: |
| case 0x4: |
| case 0x5: |
| return cpuinfo_uarch_zen3; |
| case 0x1: |
| case 0x6: |
| case 0x7: |
| case 0xA: |
| return cpuinfo_uarch_zen4; |
| } |
| break; |
| } |
| break; |
| case cpuinfo_vendor_hygon: |
| switch (model_info->family) { |
| case 0x00: |
| return cpuinfo_uarch_dhyana; |
| } |
| break; |
| default: |
| break; |
| } |
| return cpuinfo_uarch_unknown; |
| } |
|
|