observerw/main / chip__ADV7513-Example__Verilog___pattern_vg___112318f044
7.22 MB
2,200 files
Updated 14 days ago
NameSize
logs
metadata
reference
testbench
module_header.vh508 Bytes
xet
prompt.txt1.41 kB
xet
sample.json796 Bytes
xet
Total size
7.22 MB
Files
2,200
Last updated
Apr 3
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